1. Field of the Invention
The present invention relates to a semiconductor device.
2. Description of the Related Art
Considering high performance of a semiconductor integrated circuit device, a technique of applying stress to a channel region has been proposed (e.g., see Jpn. Pat. Appln. KOKAI Publication No. 2006-229071). For example, a channel region is sandwiched between SiGe layers, and thereby, compression stress is applied to the channel region. Thus, this serves to increase a hole mobility of a p-type MIS transistor.
However, when a silicide layer is formed on the SiGe layer, it is difficult to apply sufficient stress to the channel region, and to obtain a preferable silicide layer.